Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2006-07-18
2006-07-18
Tran, Michael T. (Department: 2827)
Static information storage and retrieval
Floating gate
Multiple values
C365S185240
Reexamination Certificate
active
07079416
ABSTRACT:
In a nonvolatile semiconductor memory device in which a plurality of threshold values are set to store multi-level data in a memory cell, bits of multi-bit data are separately written into a memory cell according to an address signal or a control signal to effect the reading and erasing. Concretely, the memory array is so constituted that it can be accessed by three-dimensional address of X, Y and Z, and multi-bit data in the memory cell is discriminated by the Z-address.
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Miyazawa Kazuyuki
Sato Hiroshi
Tsujikawa Tetsuya
Yamada Naoki
Antonelli, Terry Stout and Kraus, LLP.
Hitachi , Ltd.
Tran Michael T.
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