Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-04-10
2009-06-23
Lam, David (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240, C365S185170, C365S185180
Reexamination Certificate
active
07551483
ABSTRACT:
In a nonvolatile memory having an array of memory cells, wherein the memory cells are individually programmable to one of a range of threshold voltage levels, there is provided a predictive programming mode in which a predetermined function predicts what programming voltage level needs to be applied in order to program a given memory cell to a given target threshold voltage level. In this way, no verify operation needs to be performed, thereby greatly improving the performance of the programming operation. In a preferred embodiment, the predetermined function is linear and is calibrated for each memory cell under programming by one or more checkpoints. A checkpoint is a set of coordinates on the predetermined function determined by a conventional programming mode employing alternating program and verify operations.
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Davis , Wright, Tremaine, LLP
Lam David
Sandisk Corporation
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