Non-volatile memory with controlled program/erase

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185090, C365S185240, C365S185280, C365S185290

Reexamination Certificate

active

07397703

ABSTRACT:
A method for programming/erasing a non-volatile memory (NVM) includes performing a program/erase operation on a portion of the NVM using a first set of parameters. The method further includes determining whether each cell in the portion of the NVM passes a first margin level, if not determining which one of a set of lower margin levels than the first margin level each cell in the portion of the NVM passes. The method further includes modifying at least one of the set of parameters associated with a subsequent program/erase operation for the portion of the NVM based on the determined one of the set of lower margin levels.

REFERENCES:
patent: 5835415 (1998-11-01), Harari
patent: 5963480 (1999-10-01), Harari
patent: 5991201 (1999-11-01), Kuo et al.
patent: 6462988 (2002-10-01), Harari
patent: 6504762 (2003-01-01), Harari
patent: 6570790 (2003-05-01), Harari
patent: 6643181 (2003-11-01), Sofer et al.
patent: 7236402 (2007-06-01), Suhail
patent: 2003/0218920 (2003-11-01), Harari

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