Non-volatile memory with both single and multiple level cells

Details Non-volatile memory with both single and multiple level cells Non-volatile memory with both single and multiple level cells

2008-12-08

2010-08-10

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185240

Reexamination Certificate

active

07773418

ABSTRACT:
Memory arrays, and modules, devices and systems that utilize such memory arrays, are described as having a single level non-volatile memory cell interposed between and coupled to a select gate and a multiple level non-volatile memory cell. Various embodiments include structure, process, and operation and their applicability for memory devices and systems. In some embodiments, a memory array is described as including a number of select gates coupled in series to a number of single level non-volatile memory cells and a number of multiple level non-volatile memory cells, where a first select gate is coupled to a first single level non-volatile memory cell interposed between and coupled to the first select gate and a first multiple level non-volatile memory cell.

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