Non-volatile memory with both single and multiple level cells

Details Non-volatile memory with both single and multiple level cells Non-volatile memory with both single and multiple level cells

2011-08-16

2011-08-16

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185240

Reexamination Certificate

active

08000136

ABSTRACT:
Memory arrays and methods of operating such memory arrays are described as having a memory cell operated as a single level cell interposed between and coupled to a select gate and a memory cell operated as a multiple level memory cell. In some embodiments, a memory array is described as including a number of select gates coupled in series to a number of memory cells operated as single level memory cells and a number of memory cells operated as multiple level memory cells, where a first select gate is directly coupled to a first memory cell operated as a single level memory cell interposed between and coupled to the first select gate and a continuous number of memory cells operated as multiple level memory cells.

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