Non-volatile memory devices that include a programming...

Details Non-volatile memory devices that include a programming... Non-volatile memory devices that include a programming...

2007-02-20

2007-02-20

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S238500, C365S189050, C365S189120, C365S189080

Reexamination Certificate

active

11025859

ABSTRACT:
A non-volatile semiconductor memory device includes a cell array including a plurality of memory cells arranged in a plurality of rows and columns. A page buffer circuit includes a plurality of page buffers corresponding to the plurality of columns, respectively, each page buffer including a first register that is configured to store programming data for a page memory cells and a second register that is configured to store contents of the first register and outside input data. A pass/fail check circuit is configured to generate a programming verification result for the pages of memory cells responsive to the contents of the first registers. A pass/fail check latch circuit is configured to store the programming verification result.

REFERENCES:
patent: 6625063 (2003-09-01), Kim
patent: 6922364 (2005-07-01), Kojima
patent: 6999347 (2006-02-01), Mitani
patent: 2003/0016562 (2003-01-01), Im
patent: 1020020043378 (2002-06-01), None
patent: 1020030051402 (2003-06-01), None

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