Non-volatile memory device and method of verifying a program...

Details Non-volatile memory device and method of verifying a program... Non-volatile memory device and method of verifying a program...

2009-01-29

2011-12-27

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185050, C365S185180, C365S185220, C365S185240, C365S203000, C365S205000

Reexamination Certificate

active

08085587

ABSTRACT:
A page buffer in a non-volatile memory device for performing a program operation for a multi level cell having m bits includes first register to mth registers, a first data transmitting circuit configured to transmit data stored in a first node or a second node of the first register to a sensing node in accordance with a first data transmitting signal or a second data transmitting signal, and (m−1) sensing node discharging circuits configured to couple the sensing node to ground in accordance with data stored in a first node or a second node of each of the second to mth registers, and a first sensing node discharge signal or a second sensing node discharge signal.

REFERENCES:
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patent: 6650570 (2003-11-01), Tanzawa et al.
patent: 7539057 (2009-05-01), Hwang et al.
patent: 7577030 (2009-08-01), Tokiwa et al.
patent: 7796440 (2010-09-01), Lee
patent: 7978532 (2011-07-01), Hwang et al.
patent: 1020070010305 (2007-01-01), None
patent: 100816155 (2008-03-01), None
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Feb. 16, 2010.

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