Non-volatile memory device and fabricating method thereof

Details Non-volatile memory device and fabricating method thereof Non-volatile memory device and fabricating method thereof

2007-02-02

2008-10-21

Menz, Douglas M (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

C257S499000

Reexamination Certificate

active

07439603

ABSTRACT:
The present invention provides a non-volatile memory device and fabricating method thereof, by which a cell size can be lowered despite high degree of cell integration and by which the device fabrication is facilitated. The present invention includes at least two trench isolation layers arranged in a device isolation area of a semiconductor substrate, each having a first depth, a first conductive type well arranged between the at least two trench isolation layers to have a second depth smaller than the first depth, a second conductive type source region and a second conductive type drain region arranged in a prescribed upper part of the first conductive type well to be separated from each other by a channel region in-between, an ONO layer on the channel region of the semiconductor substrate, the ONO layer comprising a lower oxide layer, a nitride layer, and an upper oxide layer, and a wordline conductor layer on the ONO layer.

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patent: 6984569 (2006-01-01), Karlsson et al.

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