Non-volatile memory device and data storing method

Details Non-volatile memory device and data storing method Non-volatile memory device and data storing method

2002-02-26

2004-05-04

Nelms, David (Department: 2818)

Static information storage and retrieval

Floating gate

Particular connection

C365S185110, C365S189040, C365S189050, C365S189120, C365S196000, C365S230030, C365S230060, C365S230080, C365S236000, C365S239000, C365S240000

Reexamination Certificate

active

06731537

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a technology that may be applied to a non-volatile storage device, for example, to a technology that may be applied to a non-volatile semiconductor memory such as a flash memory or a card storage device, such as a multimedia card or a smart media memory card, that contains such a non-volatile semiconductor memory.
Recently, a card storage device, called a memory card containing a non-volatile memory, such as a flash memory, that retains its storage data even after the power has been switched off, is widely used as a data storage medium for portable electronic apparatus such as a digital camera.
Unlike a volatile memory such as a RAM, a non-volatile memory requires a longer write time. To solve this problem, some memory cards that contain a non-volatile memory further contain a buffer memory including of a RAM with a memory amount smaller than that of the non-volatile memory. When storing data, write data transferred from an external host CPU is once transferred to this buffer memory and then sequentially transferred from this buffer memory to the non-volatile memory (for example, JP-A-2-62687 laid-open on Mar. 2, 1990).
However, a conventional memory card that contains a buffer memory transfers data as follows. That is, as shown in
FIG. 10
, a write command is sent during period T
1
and a predetermined amount of write data is transferred from the host CPU to the buffer memory during period T
2
. Then, during period T
3
, one unit of data that is written at a time is transferred from the buffer memory to the non-volatile memory. On the other hand, after sending data DATA
3
, the host CPU stops data transfer to the buffer memory and waits until data is written in the non-volatile memory (period T
4
). Then, after confirming that data has been written on the memory card, the next write data is transferred from the host CPU to the buffer memory (period T
5
′).
The advantage of this method is that, even if the write operation fails for some reason, the write data need not be transferred again from the host CPU to the memory card because the write data is retained in the buffer memory for period T
4
during which the write data is written into the non-volatile memory. However, the problem with this method is that the overhead is large and that total write time is long because, for period T
4
during which data is written into the non-volatile memory, data transfer to the buffer memory is suspended and the host CPU is put in the wait state and because the write operation of the non-volatile memory is also put in the wait state for the period during which the next data is transferred from the host CPU to the buffer memory.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a technology that reduces the write-data transfer overhead of a card storage device containing a non-volatile memory and a buffer memory to reduce the data write time.
The above-described objects and other objects, as well as the new features, of the present invention will be made more apparent by the detailed description and the accompanying drawings of this specification.
According to one aspect of the present invention, in a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes of a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory and data is transferred to the non-volatile memory from a bank that becomes full. The write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
According to the above aspect, data is transferred from the host CPU to the buffer memory concurrently with the data transfer from the buffer memory to the non-volatile memory. This method reduces the write data transfer overhead and greatly reduces the time required for writing data.
According to another aspect of the present invention, the card storage device further comprises a status register or a status flag indicating a completion/incompletion of the data transfer from the buffer memory to the non-volatile memory, wherein the status of the status register or the status flag are controlled by the controller. This configuration allows the host CPU to reference the status register or the status flag and to determine easily whether the next data may be transferred from the host CPU to the buffer memory.
According to another aspect of the present invention, the card storage device further comprises a first register containing information on a bank into which data is being entered from the external unit; and a second register containing information on a bank from which data is being transferred from the buffer memory to the non-volatile memory, wherein the controller judges the completion/incompletion of the data transfer to or from each bank, based on the bank information in the first register and the second register, to control the status register or the status flag. Alternatively, the card storage device further comprises a flag, for each bank, indicating whether or not the corresponding bank has data to be transferred to the non-volatile memory, wherein the controller judges the completion/incompletion of the data transfer to or from each bank, based on the flag status, to control the status register or the status flag. This configuration makes it easy to concurrently control the transfer of data from the buffer memory to the non-volatile memory and the transfer of data from the host CPU to the buffer memory.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 6011741 (2000-01-01), Wallace et al.
patent: 6026020 (2000-02-01), Matsubara et al.
patent: 6145069 (2000-11-01), Dye
patent: 6421279 (2002-07-01), Tobita et al.
patent: 6549974 (2003-04-01), Kaki et al.
patent: 2002/0051394 (2002-05-01), Tobita et al.
patent: 2002/0191442 (2002-12-01), Kobayashi et al.
patent: 2003/0046483 (2003-03-01), Moschopoulos
patent: 2-62687 (1990-03-01), None

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