Non-volatile memory device

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185050, C365S185290

Reexamination Certificate

active

06912162

ABSTRACT:
The present invention includes a method of fabricating a non-volatile memory device having two transistors for two-bit operations to improve electron trapping efficiency and integration degree of the non-volatile memory device, and a method of driving the non-volatile memory device. The EEPROM device acccording to the present invention comprises a silicon substrate including a first and a second channel area, a first and a second conductive gate on the first and the second channel area, respectively, facing each other, a first and a second insulation layer in the bottom of the first and the second gate, and a first and a second junction area of a second conductive type between the first and the second channel area overlapping with the first and the second conductive gate.

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patent: 6707079 (2004-03-01), Satoh et al.
patent: 2002/0196663 (2002-12-01), Kuo

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