Non-volatile memory control

Details Non-volatile memory control Non-volatile memory control

2002-09-27

2004-06-15

Nguyen, Viet Q. (Department: 2818)

Static information storage and retrieval

Addressing

Combined random and sequential addressing

C365S189011, C365S230010, C365S230030

Reexamination Certificate

active

06751155

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a solid state memory system for data storage and retrieval, and to a memory controller for controlling access to a non-volatile memory of a solid state memory system and particularly to a method and apparatus of fast access of the data in the memory system with precise control of power consumption including the control of flash (or non-volatile) memory accesses.
2. Description of the Prior Art
It is well known to use solid state memory systems to try to emulate magnetic disc storage devices in computer systems. It is an aim of the industry to try to increase the speed of operation of solid state memory systems to better emulate magnetic disc storage.
A typical memory system comprises a non-volatile (Flash) memory and a controller. The memory has individually addressable sectors where a memory sector is a group of flash memory locations which is allocated for storage of one Logical Sector. A memory sector need not be a physical partition within Flash memory, not contiguous Flash memory locations, so that the memory sector address may be a virtual address conveniently used by the controller. The controller writes data structures to and reads data structures from the memory, and translates logical addresses received from the host to physical (virtual) addresses of the memory sectors in the memory.
An example of such a memory system is illustrated by the Memory System of patent publication number WO 00/49488. In
FIG. 1
(prior art), there is illustrated the timing of various operations involved in a multiple sector write to interleaved flash chips forming a flash array described for the memory system of WO 00/49488.
However in many systems, and in particular systems such as portable computers, the maximum level of electrical current is a very important parameter defining the system design, efficiency and cost. For systems, which include memory storage devices, the number of flash memory chips active at the time is a major factor defining the current level. It is therefore important to control the maximum value of electrical current level to avoid high peaks, which can cause higher requirements to the host system power supply. It is also important to be able to change the maximum current level and to compromise on performance if required.
Thus, a need arises to obviate or mitigate at least one of the aforementioned problems.
SUMMARY OF THE INVENTION
An object of the invention is to provide a method of controlling flash memory accesses in a memory system configured to use concurrent operation in different flash memory arrays, and allowing performance to be changed easily in systems supporting concurrent flash operations in different Flash arrays.
According to an embodiment of the present invention, there is provided a method for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time, wherein the method comprises implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time, the arrangement being such that the controller waits for the at least one of the arrays to complete before initiating the transfer to and from a further array.
An embodiment of the present invention also provides a memory system having a non-volatile memory incorporating a plurality of memory arrays and a controller, which is arranged to implement the method described hereinabove.


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