Non-volatile memory circuit having a common write and erase term

Details Non-volatile memory circuit having a common write and erase term Non-volatile memory circuit having a common write and erase term

1983-03-15

1986-05-13

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

365189, G11C 700, G11C 1136

Patent

active

045890978

ABSTRACT:
A non-volatile memory circuit comprising a plurality of semiconductor non-volatile memory elements, with erasure of data stored in all of these elements, enabling of selective write-in to all of the elements and read-out of stored data being controlled by potentials applied to a single control terminal. Use of a single terminal for these functions, rather than a pair of terminals as in the prior art, makes the circuit highly suitable for ultra-miniature electronic device applications.

REFERENCES:
patent: 4247918 (1981-01-01), Iwahashi et al.
patent: 4305083 (1981-12-01), Gutierrez
patent: 4366555 (1982-12-01), Hu
Gosney, "DIFMOS-A Floating Gate Electrically Erasable Nonvolatile Semiconductor Memory Technology," IEEE Transactions on Electron Devices, vol. ED-24, No. 5, May 1977, pp. 594-599.
Koike et al, "Electrically Erasable Nonvolatile Optical MNOS Memory Device," IEEE Journal of Solid State Circuits, vol. SC-11, No. 2, Apr. 1976, pp. 303-307.

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