Non-volatile memory cells using only positive charge to store da

Static information storage and retrieval – Floating gate – Particular connection

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Details

3651851, 257318, 257321, G11C 1604, H01L 2978

Patent

active

057425426

ABSTRACT:
An improved EEPROM structure is provided which has a longer data retention period. This is achieved by utilizing only positive charges to store data on the floating gate. The EEPROM structure includes a write select transistor (112), a read select transistor (120), and a floating gate sense transistor (126). The source of the write select transistor is capacitively coupled to the floating gate of the floating gate sense transistor via a tunnel oxide layer (145). The floating gate of the floating gate sense transistor is also capacitively coupled to a control gate line (CG) via a gate oxide layer (153). The sense transistor is formed as an enhancement transistor so as to allow the EEPROM structure to be operated in a region where the floating gate potential is positive for both programmed and erased conditions, thereby using only the positive charges to store data.

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patent: 5005155 (1991-04-01), Radjy
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