Non-volatile memory cell with gated diode and MOS transistor...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185180, C365S185290

Reexamination Certificate

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06862216

ABSTRACT:
A non-volatile memory cell including a gated diode and a single readout transistor, methods for programming and reading out such a cell, and a memory including an array of such cells. The readout transistor is an MOS transistor. The transistor and gated diode are formed in a volume of semiconductor material of one type, and share a source region, a control gate, and a floating gate. The transistor has a drain region formed of semiconductor material of one type and the diode has a drain region formed of semiconductor material of the opposite type.

REFERENCES:
patent: 4698787 (1987-10-01), Mukherjee et al.
patent: 6137723 (2000-10-01), Bergemont et al.
patent: 6282123 (2001-08-01), Mehta
patent: 6795348 (2004-09-01), Mihnea et al.
patent: 20040080982 (2004-04-01), Roizin

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