Active solid-state devices (e.g. – transistors – solid-state diode – Organic semiconductor material
Reexamination Certificate
2007-09-04
2007-09-04
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Organic semiconductor material
C257S314000, C257S315000, C438S257000, C438S259000
Reexamination Certificate
active
10533215
ABSTRACT:
A nonvolatile memory cell, memory cell arrangement, and method for production of a nonvolatile memory cell is disclosed. The nonvolatile memory cell includes a vertical field-effect transistor (FET). The FET contains a nanoelement arranged as a channel region and an electrically insulating layer. The electrically insulating layer at least partially surrounds the nanoelement and acts as a charge storage layer and as a gate-insulating layer. The electrically insulating layer is arranged such that electrical charge carriers may be selectively introduced into or removed from the electrically insulating layer and the electrical conductivity characteristics of the nanoelement may be influenced by the electrical charge carriers introduced into the electrically insulating layer.
REFERENCES:
patent: 5899734 (1999-05-01), Lee
patent: 6361861 (2002-03-01), Gao et al.
patent: 6407426 (2002-06-01), Ahn et al.
patent: 6707098 (2004-03-01), Hofmann et al.
patent: 6740910 (2004-05-01), Roesner et al.
patent: 6798000 (2004-09-01), Luyken et al.
patent: 6930343 (2005-08-01), Choi et al.
patent: 2001/0023986 (2001-09-01), Mancevski
patent: 2002/0001905 (2002-01-01), Choi et al.
patent: 2002/0130311 (2002-09-01), Cui et al.
patent: 2005/0145838 (2005-07-01), Furukawa et al.
patent: 100 36 897 (2000-07-01), None
patent: 10032370 (2001-12-01), None
patent: 1 170 799 (2002-01-01), None
English Translation of International Preliminary Report from corresponding international Application No. PCT/DE2003/003588.
S.J. Wind, A. Appenzeller, R. Martel, V. Derycke and Ph. Avouris,Vertical Scaling of Carbon Nontube Field-Effect Transistors Using Top Gate Electrodes, pp. 3817-3819, vol. 80, No. 20, May 20, 2002.
M.S. Fuhrer, B.M. Kim, T. Durkop and T. Brintlinger,High-Mobility Nanotube Transistor Memory, pp. 755-759, vol. 2, No. 7, American Chemical Society 2002.
M. Radosavljevic, M. Freitag, K.V. Thadani, A.T. Johnson,Nonovolatile Molecular Memory Elements Based on Ambipolar Nanotube Field Effect Transistors, pp. 761-764, vol. 2, No. 7, American Chemical Society, 2002.
Howard Pein and James D. Plummer,Performance of the 3-D PENCIL Flash EPROM Cell and Memory Array, pp. 1982-1991, No. 11, IEEE Transactions on Electron Devices, Nov. 1995.
The International Examination Report from corresponding PCT patent application No. PCT/DE03/03588.
The International Search Report from corresponding PCT patent application No. PCT/DE03/03588.
Graham Andrew
Hofmann Franz
Hönlein Wolfgang
Kretz Johannes
Kreupl Franz
Brinks Hofer Gilson & Lione
Infineon Technologies Inc.
Nguyen Cuong
LandOfFree
Non-volatile memory cell, memory cell arrangement and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile memory cell, memory cell arrangement and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile memory cell, memory cell arrangement and method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3727071