Non-volatile memory apparatus for controlling page buffer...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S189050

Reexamination Certificate

active

07830712

ABSTRACT:
A non-volatile memory apparatus for controlling a page buffer includes a page buffer configured to include a plurality of buffer stages, each buffering input/output data of cell arrays in units of predetermined number of bits, and a control unit configured to selectively activate one of the plurality of buffer stages when a burst mode as a synchronous mode is activated.

REFERENCES:
patent: 7130222 (2006-10-01), Ho et al.
patent: 7254076 (2007-08-01), Chae et al.
patent: 2008/0250195 (2008-10-01), Chow et al.
patent: 2007080415 (2007-03-01), None
patent: 1020030014255 (2003-02-01), None

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