Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2001-10-12
2003-04-29
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Floating gate
Multiple values
C365S185180, C365S185230, C365S185240, C365S185280
Reexamination Certificate
active
06556475
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor non-volatile memory, and particularly to an electrically writable and erasable semiconductor non-volatile memory (also called an EEPROM or Electrically Erasable and Programmable Read Only Memory). The present invention is particularly effective for a semiconductor non-volatile memory using a multi-value technique. Besides, the present invention relates to a semiconductor device including the semiconductor non-volatile memory.
2. Description of the Related Art
In the present specification, an electrically writable and erasable semiconductor non-volatile memory (EEPROM) indicates all semiconductor non-volatile memories in which electrical writing and electrical erasing are literally enabled, and includes, for example, a full function EEPROM and a flash memory in its category. Unless otherwise specified, the non-volatile memory and the semiconductor non-volatile memory are used to mean the EEPROM. Besides, the semiconductor device indicates all devices functioning by using semiconductor characteristics, and includes, for example, a microprocessor, an electro-optic device typified by a liquid crystal display device and an EL display device, and an electronic equipment incorporating a microprocessor or an electro-optic device in its category.
In recent years, an electrically writable and erasable semiconductor non-volatile memory (EEPROM), especially a flash memory has attracted attention as a promising candidate of a memory substituting for a magnetic disk or a DRAM. Above all, a so-called multi-value non-volatile memory each memory element of which stores data of three or higher values has attracted attention as a large capacity memory.
The non-volatile memory is divided into types, such as a NOR type, a NAND type, an AND type or a DINOR type, based on differences in their circuit structures and operation methods. As a memory element constituting the non-volatile memory, there is known a memory transistor including a floating gate, a memory transistor including a cluster layer, a memory transistor having MNOS (Metal-Nitride-Oxide-Semiconductor) structure or MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) structure, or the like.
In a conventional non-volatile memory, a hot electron injection method (called an HE injection system) and a charge injection method by FN tunnel current (called an FN current system) can be cited as a typical writing operation. In the HE injection system, a high control gate voltage and a high drain voltage are applied to a memory transistor to cause impact ionization, and a generated hot electron is drawn into a gate electrode side, so that an electric charge is injected into the memory transistor. On the other hand, in the FN current system, a high voltage is applied between a control gate electrode and a substrate to cause an FN tunnel current to flow, so that an electric charge is injected into a memory transistor.
In either case, in order to confirm that a threshold voltage after writing is within a predetermined range, verify writing is normally carried out. Especially, in a multi-value non-volatile memory, since it is necessary to control the threshold voltage after writing with high accuracy, the verify writing is indispensable. The verify writing is a method in which a small amount of charge injection and readout for confirming the threshold voltage are alternately carried out. This operation is repeated until the threshold voltage after writing falls within a predetermined range.
In the foregoing method of charge injection, there has been a problem that it is difficult to control the amount of charge injection with accuracy. This is because even in the case where the same operation voltage is applied to the memory transistor, if the charge storage amount of the memory transistor, that is, the threshold voltage is different, the charge injection speed is different.
Thus, naturally in memory transistors having different threshold voltages, even in the same memory transistor, the charge injection speed is changed as time elapses. For example, in the case where an electron is injected, a threshold voltage is increased, and an effective gate voltage seen from a channel region is decreased, so that the charge injection speed is decreased.
Further, if the charge injection speed fluctuates by a factor such as fluctuation in film quality of a tunnel oxide film, even if threshold voltages of memory transistors before writing are equal to each other, a difference gradually occurs in the charge storage amount. Then, a vicious circle occurs in which when a difference occurs in the threshold voltage, a charge injection amount further fluctuates.
The verify writing is one of methods for solving such problems. In the verify writing, since confirmation of the threshold voltage is carried out each time a small amount of charge is injected, it is not necessary to control the charge injection amount with high accuracy. However, in the verify writing, the operation of charge injection is divided into parts, and a readout operation is carried out between them, so that there is a problem that it essentially takes a period of time.
Incidentally, also in the verify writing, it is important to control the charge injection amount with accuracy. By controlling the charge injection amount with high accuracy, the number of times of division of the charge injection operation can be decreased, and so a verify writing time period can be shortened.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above problems. An object of the present invention is to provide a non-volatile memory for carrying out a writing operation in which a charge injection amount can be controlled with high accuracy. Another object of the invention is to provide a non-volatile memory which realizes shortening of a verify writing time, and further, realizes substantial shortening of a writing time by a writing system without using a verify system. A still another object of the invention is to provide a semiconductor device including such a non-volatile memory.
As already described, in the conventional writing method, the charge injection speed depends on the charge storage amount of the memory transistor, and accordingly, depends on the threshold voltage. As a result, naturally in memory transistors of different states, even in the same memory transistor, the charge injection speed is changed as time elapses, and control of the charge injection amount has been difficult.
On the contrary, this means that in order to control the charge injection amount with high accuracy, a writing method is effective which has a charge injection speed independent on the charge storage amount of a memory transistor, that is, the threshold voltage. The inventor of the present invention has considered that the charge injection speed depends on the threshold voltage of the memory transistor since a control gate voltage of the memory transistor is directly controlled at the time of writing, and has devised, as a new writing method, a method of controlling a drain voltage and a drain current of the memory transistor.
That is, a non-volatile memory of the present invention is characterized in that a writing operation of a hot electron injection system is carried out by controlling a drain voltage and a drain current of a memory transistor. This writing method is characterized in that a control gate voltage is not directly controlled, but the control gate voltage is indirectly controlled so that the drain current becomes constant, and is characterized in that a charge injection speed does not depend on a threshold voltage.
In order to understand a writing operation in a non-volatile memory of the present invention, a simple circuit for carrying out writing into one memory element is cited as an example, and its operation method will be described.
FIGS. 1A and 1B
are used for the description.
As a memory element, various elements as shown in
FIGS. 26A
to
26
D can be used (see embodiment 3 for more de
Kato Kiyoshi
Koyama Jun
Yamazaki Shunpei
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Nguyen Viet Q.
Semiconductor Energy Laboratory Co,. Ltd.
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