Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2006-09-22
2009-08-04
Phan, Trong (Department: 2827)
Static information storage and retrieval
Floating gate
Multiple values
C365S185170, C365S185180, C365S185220, C365S185240, C365S185290, C365S185330
Reexamination Certificate
active
07570513
ABSTRACT:
A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during read, and program/verify operations. A read or program verify operation includes one or more sensing cycles relative to one or more demarcation threshold voltages to determine a memory state. In one aspect, selective memory cells among the group being sensed in parallel have their conduction currents turned off when they are determined to be in a state not relevant to the current sensing cycle. In another aspect, a power-consuming period is minimized by preemptively starting any operations that would prolong the period. In a program/verify operation cells not to be programmed have their bit lines charged up in the program phase. Power is saved when a set of these bit lines avoids re-charging at every passing of a program phase.
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Chan Siu Lung
Lee Seungpil
Li Yan
Davis , Wright, Tremaine, LLP
Phan Trong
SanDisk Corporation
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