Non-volatile memory and method with bit line compensation...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185170, C365S185220

Reexamination Certificate

active

06956770

ABSTRACT:
When programming a contiguous page of memory storage units, every time a memory storage unit has reached its targeted state and is program-inhibited or locked out from further programming, it creates a perturbation on an adjacent memory storage unit still under programming. The present invention provides as part of a programming circuit and method in which an offset to the perturbation is added to the adjacent memory storage unit still under programming. The offset is added as voltage offset to a bit line of a storage unit under programming. The voltage offset is a predetermined function of whether none or one or both of its neighbors are in a mode that creates perturbation, such as in a program inhibit mode. In this way, an error inherent in programming in parallel high-density memory storage units is eliminated or minimized.

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EPO/ISA, “Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration”, mailed in corresponding PCT/US2004/030420 on Jan. 28, 2005, 12 pages.

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