Non-volatile memory

Static information storage and retrieval – Floating gate – Particular connection

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Details

36523005, 365 49, H01L 2978

Patent

active

055153208

ABSTRACT:
The non-volatile memory includes (A) a cell array including (a) memory cells arranged to form rows and columns, each cell having first and second transistors which commonly have a floating gate, (b) first and second gate lines, each connected with gates of the first and second transistors of the memory cells disposed in each of the rows and columns, respectively, (c) first and second drain lines, each connected with drains of the first and second transistors of the memory cells disposed in each of the columns and rows, respectively, and (d) source lines, each connected with sources of the first and second transistors, (B) a first voltage supplier for applying a first or second voltage to each of the first gate lines in accordance with a first input signal, (C) a detector for detecting a current running through the first drain lines and further transmitting a first output signal, (D) a second voltage supplier for applying a first or second voltage to each of the second gate lines in accordance with a second input signal, and (E) a detector for detecting a current running through the second drain lines and further transmitting a second output signal. The non-volatile memory can have functions of an orthogonal memory and a content address memory. In addition, since it is possible to compose a memory cell of two transistors, the non-volatile memory provides advantages of smaller size, larger capacitance, and lower consumption of electrical power.

REFERENCES:
patent: 4479203 (1984-10-01), Kuo
patent: 4527256 (1985-07-01), Giebel
patent: 4573144 (1986-02-01), Countryman, Jr.
patent: 4630087 (1986-12-01), Momodomi
Akio Kokubu et al., "Orthogonal Memory-A Step Toward Realization of Large Capacity Associative Memory", IFIP, 1986, pp. 165-174.

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