Non-volatile memory

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185150, C257S319000, C257S320000

Reexamination Certificate

active

11160561

ABSTRACT:
A non-volatile memory having a gate structure, a pair of storage units and two assist gates is provided. The gate structure is disposed on the substrate. The storage units are disposed on the sidewalls of the gate structure. The assist gates are disposed on the respective sides of the gate structure and adjacent to the storage units. Each assist gate is shared between two adjacent memory cells. The gate structure, the storage units and the assist gates are electrically isolated from one another.

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Article titled “90-nm-node multi-level AG-AND type flash memory with cell size of true 2 F2/bit and programming throughput of 10MB/s” jointly published by Sasago et al. in 2003 (4 pages).
Article titled “Scaled 2 bit/cell SONOS Type Nonvolatile Memory Technology for sub-90nm Embedded Application using SiN Sidewall Trapping Structure” jointly published by Fukuda et al. in 2003 (4 pages).

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