Non volatile memory

Details Non volatile memory Non volatile memory

2005-06-28

2005-06-28

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Disturbance control

C385S105000, C385S046000

Reexamination Certificate

active

06912155

ABSTRACT:
An electrically programmable and erasable nonvolatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.

REFERENCES:
patent: 5301161 (1994-04-01), Landgraf et al.
patent: 5892705 (1999-04-01), Chung
patent: 5943257 (1999-08-01), Jeon et al.
patent: 6201731 (2001-03-01), Kamp et al.
patent: 6822899 (2004-11-01), Boulos et al.

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