Non-volatile memories with improved endurance and extended lifet

Details Non-volatile memories with improved endurance and extended lifet Non-volatile memories with improved endurance and extended lifet

1999-04-16

2000-12-12

Le, Vu A.

Static information storage and retrieval

Floating gate

Particular biasing

36518533, G11C 1604

Patent

active

061607398

ABSTRACT:
Non-volatile memory cells in a sector of a memory array are selectively erased only when it is determined that the selected memory cells require erasing. A memory cell is selectively erased by applying two non-zero erase voltages to the cell, where the combination of the two erase voltages generates an electric field sufficient to induce Fowler-Nordheim tunneling and erase the cell. Memory cells not selected for erasing, either in the same sector or other sectors, have only one or none of the two erase voltages applied, which is insufficient to erase the unselected memory cells is a result, endurance of the non-volatile memory cells is improved because the memory cells are not subjected to repeated unnecessary erasing and programming operations.

REFERENCES:
patent: 5047981 (1991-09-01), Gill et al.
patent: 5341342 (1994-08-01), Brahmbhatt
patent: 5777923 (1998-07-01), Lee et al.

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