Non-volatile latch with low voltage operation

Details Non-volatile latch with low voltage operation Non-volatile latch with low voltage operation

2008-01-22

2010-11-16

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185240

Reexamination Certificate

active

07835179

ABSTRACT:
Methods, circuits, devices, and/or arrangements for providing a non-volatile latch are disclosed. In one embodiment, a non-volatile latch can include: (i) a first non-volatile memory (NVM) cell coupled to a first supply, a first gate (e.g., a control gate), and an output node, where the first NVM cell is configured to be in a first state; and (ii) a second NVM cell coupled to a second supply, a second gate (e.g., another control gate), and the output node, where the second NVM cell is configured to be in a second state.

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patent: 2004/0264271 (2004-12-01), Tanzawa et al.

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