Non-volatile electronic memory and method for the management the

Details Non-volatile electronic memory and method for the management the Non-volatile electronic memory and method for the management the

1997-11-26

1999-11-02

Nelms, David

Static information storage and retrieval

Floating gate

36518529, 36518528, 36518526, G11C 1604

Patent

active

059782617

ABSTRACT:
To increase the integration density of an EEPROM type memory, it is chosen to do without the selection transistor. To then arrive at a selection operation in erasure, programming or reading modes, it is chosen to apply negative voltages or voltages with a value half that of a programming voltage (VPP) to certain connections (with r' different from r) of the memory.

REFERENCES:
patent: 4751678 (1988-06-01), Raghunathan
patent: 5124945 (1992-06-01), Schreck
patent: 5283758 (1994-02-01), Nakayama et al.
patent: 5467307 (1995-11-01), D'Arrigo et al.
patent: 5583808 (1996-12-01), Brahmbhatt
French Search Report from French application No. 9614715, filed Nov. 29, 1996.
A High Capacitive Coupling Ratio (HiCR) Cell for Single 3 V Power Supply Flash Memories, Kanamori et al., vol. 36, No. 1, Jan. 1995, pp. 122-131.

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