Non-volatile dynamic random access memory device; a page store d

Static information storage and retrieval – Addressing – Byte or page addressing

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365145, 365195, 365228, G11C 800, G11C 1400

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053813790

ABSTRACT:
An NVDRAM memory device which performs a recall operation in which non-volatile data stored in memory cell is converted to volatile data in a recall mode, a store operation in which the volatile data stored in the memory cell is converted to the non-volatile data in a store mode, and a read/write operation in which the volatile data stored in the memory cell is read or written in a DRAM mode, includes: a counter circuit for counting the number of the recall or store operations, which generates an inhibit signal in the case where a counted value exceeds a predetermined value and resets the counted value in response to an external reset signal; and an inhibit unit for inhibiting the recall or store operation in response to the inhibit signal given from the counter circuit.

REFERENCES:
patent: 4611309 (1986-09-01), Chuang et al.
patent: 4809225 (1989-02-01), Dimmler et al.
patent: 5146431 (1992-09-01), Eby et al.
Terada, Y., et al., "A new architecture for the NVRAM--an EEPROM backed-up dynamic RAM" IEEE Journal of Solid State Circuits (Feb. 1988) 23(1): 86-90.
Yamauchi, Y., et al., "A versatile stacked storage capacitor on flotox cell for megabit NVRAM applications" reprinted from IEDM Tech. Dig. (1989) pp. 595-598.
Fukumoto, K., et al., "A 256k-bit non-volatile PSRAM with page recall and chip store" 1991 Symposium on VLSI Circuits, Digest of Technical Papers (May 1991) pp. 91-92.
Evans, J. T., et al., "An experimental 512-bit nonvolatile memory with ferroelectric storage cell" reprinted from IEEE Journal of Solid-State Circuits (Oct. 1988) 23(5):1171-1175.
Moazzami, R., et al., "A ferroelectric DRAM cell for high-density NVRAM's" reprinted from IEEE Electron Device Lett. (Oct. 1990) 11(10):454-456.
Matsukuma, S., et al., "Present and future conditions of ferroelectric memory" Semiconductor World (May 1990) pp. 118-125. A partial English abstract is also included herewith.
Womack, R., et al., "A 16kb ferroelectric nonvolatile memory with a bit parallel architecture" ISSCC 89 (Feb. 1989) pp. 242-243.

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