Static information storage and retrieval – Addressing – Byte or page addressing
Patent
1993-12-03
1995-01-10
Popek, Joseph A.
Static information storage and retrieval
Addressing
Byte or page addressing
365145, 365195, 365228, G11C 800, G11C 1400
Patent
active
053813790
ABSTRACT:
An NVDRAM memory device which performs a recall operation in which non-volatile data stored in memory cell is converted to volatile data in a recall mode, a store operation in which the volatile data stored in the memory cell is converted to the non-volatile data in a store mode, and a read/write operation in which the volatile data stored in the memory cell is read or written in a DRAM mode, includes: a counter circuit for counting the number of the recall or store operations, which generates an inhibit signal in the case where a counted value exceeds a predetermined value and resets the counted value in response to an external reset signal; and an inhibit unit for inhibiting the recall or store operation in response to the inhibit signal given from the counter circuit.
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Evans, J. T., et al., "An experimental 512-bit nonvolatile memory with ferroelectric storage cell" reprinted from IEEE Journal of Solid-State Circuits (Oct. 1988) 23(5):1171-1175.
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Popek Joseph A.
Sharp Kabushiki Kaisha
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