Active solid-state devices (e.g. – transistors – solid-state diode – With means to absorb or localize unwanted impurities or...
Reexamination Certificate
1999-08-04
2004-12-07
Lee, Eddie (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
With means to absorb or localize unwanted impurities or...
C257S130000, C257S131000, C257S611000, C257S612000, C438S471000, C438S472000, C438S473000, C438S474000, C438S475000, C438S476000, C438S477000
Reexamination Certificate
active
06828690
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to a process for the preparation of high performance silicon power devices having improved turn-off or switching time, as well as forward voltage drop. More specifically, the process of the present invention relates to the preparation of a silicon segment containing regions having different minority carrier lifetimes by means of controlling the concentration profile of recombination centers within the silicon segment.
For designers of certain types of solid state power devices, such as thyristors or power diodes, both the switching speed and turn-off charge are important considerations. As the switching speed increases and the turn-off charge decreases, the more efficient the device becomes. Unfortunately, however, conventional methods of increasing the switching speed of a particular device often result in an appreciable increase in turn-off charge, or forward voltage drop, which acts to hinder device efficiency.
Typically, in the “on” state, power devices are flooded with excess carriers which are responsible for carrying the large current that is required. Problems arise with such devices, however, when the devices are switched off; more specifically, problems arise with how to get rid of these carriers when they are no longer needed. Minority carrier recombination has been identified as one of the major mechanisms by which these excess carriers may be dissipated. The faster recombination occurs, the faster a power device can be depleted of carriers when switched off and, therefore, the faster the device actually switches off. However, if the recombination rate is high throughout the bulk of the device, then a higher voltage is required to support the current when the device is on. As a result, the power consumption of the device is increased and, accordingly, the efficiency of the device is decreased. Therefore, any improvement in the switching speed of the device is achieved at the cost of decreased device efficiency.
It is known in the art that doping semiconductor devices with lifetime killing impurities (i.e., recombination centers such as gold or platinum) results in an increase in the recombination rate when the device is turned off, and thus an increase in the switching speed as well. (See, e.g., V. Temple and F. Holroyd, “Optimizing Carrier Lifetime Profile for Improved Trade-off Between Turn-off Time and Forward Drop,”
IEEE Transactions on Electron Devices
, ed. 23, pp. 783-790 (1983).) In the past, such impurity doping has typically been applied to large areas of the device, even throughout the entire bulk of the device. This approach has resulted in significant decreases in the device turn-off time. However, accompanied with this improvement is an increase in device forward voltage drop. Similar results have been obtained when alternative methods of “lifetime killing” have been employed, including electron, proton and gamma radiation, throughout the bulk of the device.
In an attempt to avoid the problems associated with bulk doping or bulk treatment of the device, local lifetime killing has been proposed. (See, e.g., Temple et al.,
IEEE Transactions on Electron Devices
, pp. 783-790.) For example, local regions of a thyristor have been selectively irradiated, or doped with gold, in an attempt to control the location of the minority carrier recombination centers, and thus decrease the minority carrier recombination lifetime within a specific region of the device. Such approaches are attractive because, in theory at least, they allow for a region to be selectively doped with recombination centers, thus improving the switching speed within this region, while leaving the bulk of the device undoped, and thus prevent the large forward voltage drop associated with bulk doping or treatment of the device.
Previously, optimizing the spatial location of these recombination centers within the bulk of the device has been considered. For example, as illustrated in FIG.
1
A and
FIG. 1B
, Temple et al. demonstrated the desirability of having a region of enhanced recombination (i.e., short minority carrier lifetime) within the device in a plane which is perpendicular to the direction of the on-state current flow. However, the practical problem of how to selectively tailor or control the location of dopants within the device has to date proven difficult. In fact, Temple et al. state that the local tailoring of such a region within a device would not be easily achievable experimentally, and that any practical applications would involve an extensive development program with an unknown chance of success.
Accordingly, a need continues to exist for a process whereby the concentration of minority carrier recombination centers within a device may be selectively profiled or tailored such that these centers may be primarily located within a specific region, with the remainder of the device being substantially free of such centers.
SUMMARY OF THE INVENTION
Among the objects of the invention, therefore, is the provision of a single crystal silicon segment suitable for use in the fabrication of a solid state power device having increased switching speed without the attendant increase in forward voltage drop; the provision of such a silicon segment which contains a non-uniform depth distribution of minority carrier recombination centers; the provision of such a segment which contains a region having an improved minority carrier recombination rate; the provision of a process for manufacturing such a silicon segment in which the segment undergoes an initial thermal treatment in order to profile the vacancy concentration therein; and, the provision of such a process in which interstitial platinum atoms are in-diffused into the silicon segment under conditions which result in a platinum concentration profile generally corresponding to the vacancy concentration profile.
Briefly, therefore, the present invention is directed to a single crystal silicon segment having two major, generally parallel surfaces, one of which is the front surface of the segment and the other of which is the back surface of the segment, a central plane between the front and back surfaces, a circumferential edge joining the front and back surfaces, a surface layer which comprises the region of the segment below the front surface and a distance, D
1
, as measured from the front surface and toward the central plane, and a bulk layer which comprises a second region of the segment between the central plane and the first region. The segment is characterized in that it has a non-uniform distribution of minority carrier recombination centers, with the concentration of the centers in the bulk layer being greater than the concentration in the surface layer and with the centers having a concentration profile in which the peak density of the centers is at or near the central plane with the concentration generally decreasing from the position of peak density in the direction of the front surface of the segment.
The present invention is further directed to a single crystal silicon segment having two major, generally parallel surfaces, one of which is the front surface of the segment and the other of which is the back surface of the segment, and a central plane between the front and back surfaces. The segment is characterized in that it has a non-uniform distribution of minority carrier recombination centers between the front and back surfaces, wherein a maximum concentration of the recombination centers is in a region which is between the front surface and the central plane and nearer to the front surface than the central plane, the concentration of the recombination centers increases from the front surface to the region of maximum concentration and decreases from the region of maximum concentration to the central plane.
The present invention is further directed to a process for heat-treating a single crystal silicon segment to influence the concentration profile of minority carrier recombination centers in the segment. The silicon segment has a front surface, a bac
Kang Donghee
Lee Eddie
MEMC Electronic Materials , Inc.
Senniger Powers
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