Non-uniform memory access (NUMA) data processing system that per

Details Non-uniform memory access (NUMA) data processing system that per Non-uniform memory access (NUMA) data processing system that per

1999-02-10

2000-09-05

Follansbee, John A.

Electrical computers and digital processing systems: processing

Processing architecture

Distributed processing system

711119, 711122, 711130, 711141, 710104, G06F 1500

Patent

active

061158046

ABSTRACT:
A non-uniform memory access (NUMA) computer system includes first and second processing nodes that are each coupled to a node interconnect. The first processing node includes a system memory and first and second processors that each have a respective one of first and second cache hierarchies, which are coupled for communication by a local interconnect. The second processing node includes at least a system memory and a third processor having a third cache hierarchy. The first cache hierarchy and the third cache hierarchy are permitted to concurrently store an unmodified copy of a particular cache line in a Recent coherency state from which the copy of the particular cache line can be sourced by shared intervention. In response to a request for the particular cache line by the second cache hierarchy, the first cache hierarchy sources a copy of the particular cache line to the second cache hierarchy by shared intervention utilizing communication on only the local interconnect and without communication on the node interconnect.

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