Non-uniform memory access (NUMA) data processing system that buf

Details Non-uniform memory access (NUMA) data processing system that buf Non-uniform memory access (NUMA) data processing system that buf

1998-06-30

2000-05-23

Ellis, Richard L.

Electrical computers and digital processing systems: processing

Processing architecture

Distributed processing system

709201, 709213, 709238, 710104, 711128, 711146, G06F 1516

Patent

active

060676116

ABSTRACT:
A non-uniform memory access (NUMA) computer system includes an interconnect to which multiple processing nodes (including first, second, and third processing nodes) are coupled. Each of the first, second, and third processing nodes includes at least one processor and a local system memory. The NUMA computer system further includes a transaction buffer, coupled to the interconnect, that stores communication transactions transmitted on the interconnect that are both initiated by and targeted at a processing node other than the third processing node. In response to a determination that a particular communication transaction originally targeting another processing node should be processed by the third processing node, buffer control logic coupled to the transaction buffer causes the particular communication transaction to be retrieved from the transaction buffer and processed by the third processing node. In one embodiment, the interconnect includes a broadcast fabric, and the transaction buffer and buffer control logic form a portion of the third processing node.

REFERENCES:
patent: 5535116 (1996-07-01), Gupta et al.
patent: 5673413 (1997-09-01), Deshpande et al.
patent: 5878268 (1999-03-01), Hagersten
patent: 5887146 (1999-03-01), Baxter et al.
patent: 5893144 (1999-04-01), Wood et al.

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