Non-photosensitive, vertically redundant 2-channel .alpha.-Si:H

Details Non-photosensitive, vertically redundant 2-channel .alpha.-Si:H Non-photosensitive, vertically redundant 2-channel .alpha.-Si:H

1996-08-09

1998-08-11

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Charge transfer device

257 67, 257401, 257241, 257287, 438157, 438176, 438193, 438283, H01L 2712, H01L 21265

Patent

active

057930724

ABSTRACT:
A thin film transistor having two vertically stacked channels and dual gate non-photosensitive structure, where the source drain to bottom gate structure is self-aligned. This structure occupies the same area on a substrate as a conventional single gate thin film transistor. This invention also discloses a process for manufacturing a dual gate structure with a simple three mask procedure.

REFERENCES:
patent: 4907041 (1990-03-01), Huang
patent: 5266507 (1993-11-01), Wu
patent: 5266515 (1993-11-01), Robb et al.
patent: 5273921 (1993-12-01), Neudeck et al.
patent: 5324960 (1994-06-01), Pfiester et al.
patent: 5376559 (1994-12-01), Mukai et al.
patent: 5461250 (1995-10-01), Burghartz et al.
patent: 5650637 (1997-07-01), Kadaira et al.

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