Non-overlapping two-phase clock generator utilizing floating inv

Details Non-overlapping two-phase clock generator utilizing floating inv Non-overlapping two-phase clock generator utilizing floating inv

1990-09-04

1991-09-10

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307265, 307279, H03K 513

Patent

active

050476599

ABSTRACT:
A two-phase clock generator generates a nonoverlapping two-phase clock from a unipolar input clock by utilizing gate delays in first and second signal paths. The output of each signal path is fed over a cross-coupled feedback path back to a logic gate in the respective other signal path. Each logic gate is a floating inverter having a first supply terminal connected to a supply voltage, and having a second supply terminal that is the feed point for the respective feedback signal from the output of the other signal path.

REFERENCES:
patent: 4587441 (1986-05-01), Torelli et al.
patent: 4645947 (1987-02-01), Prak
patent: 4761568 (1988-08-01), Stronski

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