Non-metallized chip carrier

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Details

357 72, H01L 2302

Patent

active

H00011533

ABSTRACT:
A hermetically sealed carrier for integrated circuits has an IC placed on a carrier substrate, and an electrical lead apparatus, comprised of a highly heat resistant substrate with a metallized interconnect pattern deposited thereon, connected to the IC and brought out across and over the edges of the carrier substrate to facilitate electrical connection to a circuit board. A lid is provided which is placed over the IC. A low-melting temperature adhesive means is then placed on the lid-to-carrier interface and is exposed to heat hermetically sealing the IC. A hermetically sealed carrier including a single silicon die which includes both an active region where an integrated circuit may be fabricated and an inactive region is also provided. Electrical leads are electrically interconnected to the IC of the active region and extend to the periphery of the inactive region of the silicon die. A lid and adhesive means is provided for hermetically sealing the IC of the active region.

REFERENCES:
patent: 4967260 (1990-10-01), Butt
patent: 5015803 (1991-05-01), Mahulikar et al.

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