Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
1999-05-28
2001-10-23
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
Reexamination Certificate
active
06307493
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to a non-linear function generating circuit and method and more particularly to digital non-linear function generating circuits and methods.
As is known in the art, many applications require that a non-linear function of a signal be generated. One circuit used for this purpose is shown in
FIG. 1
to generate a square root function of an input signal, X. The circuit includes an analog multiplier M in a negative feedback loop provided around an operational amplifier A. The analog input signal, X, is fed to the non-inverting input of the amplifier A. The output Y of the amplifier A is fed to the pair of inputs of the multiplier M. Thus, the output of the multiplier M produces a signal representative of Y
2
. The output Y
2
is fed to the inverting input of the amplifier A. With a large amplifier gain, in the steady state the output will be equal to:
{square root over (X)}
Such method is described on page 40 of Nonlinear Circuits Handbook, Dan Sheingold, Analog Devices, Inc.
Digital circuitry has been used to determine the square root of an input signal. One technique is described in Digital Signal Processing Applications”, Prentice-Hall, 1990 [ISBN 0-13-212978-7], Section 4.4, page 57, which describes an approach based on a Taylor series expansion of the square root function. This algorithm is open loop and the square root value is available after each evaluation of the polynomial.
Another approach using a closed loop, iterative, algorithm is shown in U.S. Pat. No. 4,298,951, issued Nov. 3, 1981, entitled “Nth Root Processing Apparatus”, inventor Hall.
SUMMARY OF THE INVENTION
In accordance with the invention, apparatus is provided for processing an input signal. The apparatus includes a negative feedback loop having a sigma-delta modulator fed by the input signal and a feedback signal, such feedback signal being a non-linear function of the output of the modulator.
With such an arrangement, a sigma-delta modulator, which is in many applications is available to provide digital conversion for the input signal is here adapted for use to provide an output signal representative of a non-linear function of the input signal. Thus, the circuit is able to share the same hardware (i.e. the sigma-delta modulator) which is used to provide digital conversion of the input signal. This is particularly advantageous where the digital converter and the non-linear function generating circuit are on the same integrated circuit chip.
In accordance with another feature of the invention, apparatus is provided for processing an input signal. The apparatus includes a negative feedback loop having a sigma-delta modulator fed by the input signal and a feedback signal. The output of the sigma-delta modulator is a stream of m-bit digital words. The output of the sigma-delta modulator is fed to an filter for converting the stream of m-bit digital words produced by the sigma-delta modulator into a corresponding stream of n-bit digital words. The n-bit and m-bit streams of digital words are fed to a non-linear processing unit. The non-linear processing unit produces a series of digital words, each one of the digital words representing a non-linear combination of one of the m-bit digital words and one of the n-bit digital words. The series of digital words produced by the non-linear processor is fed to the sigma-delta modulator as the feedback signal.
In accordance with still another feature of the apparatus is provided for producing a signal representative of a non-linear function of an input signal. The apparatus includes a negative feedback loop having a sigma-delta modulator fed by the input signal and a feedback signal. The output of the sigma-delta modulator is a stream of m-bit digital words. The output of the sigma-delta modulator is fed to a filter for converting the stream of m-bit digital words produced by the sigma-delta modulator into a corresponding stream of n-bit digital words. The n-bit and m-bit streams of digital words are fed to a multiplier. The multiplier produces a series of digital words, each one of the digital words representing the product of one of the M-bit digital words and one of the n-bit digital words. The series of digital words produced by the multiplier is fed to the sigma-delta modulator as the feedback signal.
With such an arrangement, in the steady state, the feedback loop drives the feedback signal towards the input signal. Because the feedback signal is the product of the same signal, i.e., the output of the modulator, Y, the feedback signal, in the steady state is driven to Y
2
=X, where X is the input signal. Thus, in the steady state, Y represents a non-linear function of the input signal, here the square root of the input signal, X. It is noted that Y is available as an output from either the sigma-delta modulator, as a series of m-bit digital words or from the output of the filter as a series on n-bit digital words.
REFERENCES:
patent: 3953795 (1976-04-01), Brunner et al.
patent: 4298951 (1981-11-01), Hall
patent: 5099195 (1992-03-01), Greer et al.
patent: 5134401 (1992-07-01), McCartney et al.
patent: 5583501 (1996-12-01), Henrion et al.
patent: 5862069 (1999-01-01), Nestler
patent: 0 296 968 A2 (1988-12-01), None
patent: WO 86/03302 (1986-06-01), None
Denyer et al., “VLSI Signal Processing: A Bit-Serial Approach”, Addison-Wesley Publishers Limited, 1985.
Higgins, “Digital Signal Processing in VLSI” Printice-Hall, Inc., 1990, pp 533-537, Section 8.5.
Analog Devices, “Digital Signal Processing Applications Using the ADSP-2100 Family”, Printice-Hall, Inc. 1990 pp 57-60.
Analog Devices, “Nonlinear Circuits Handbook”, Analog Devices, Inc., Jan., 1976, pp 40.
Alcatel, “TP 11.1: A Power Metering ASIC with A Sigma-Delta-Based Multiplying ADC”, 1994 IEEE International Solid-State Circuits Conference.
“Oversampling-Based Balanced Modulator”, Electronics Letters, Jan. 1991, vol. 27, No. 1.
Kerth, “An Oversampling Converter For Strain Gauge Transducers”, IEEE Journal of Solid State Circuits, vol. 27, No. 12, Dec. 1992.
Analog Devices Inc.
Samuels , Gauthier & Stevens, LLP
Young Brian
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