Non-integer clock divider

Details Non-integer clock divider Non-integer clock divider

1997-01-08

2000-09-19

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327117, 377 48, H03B 1900

Patent

active

061218014

ABSTRACT:
A system for providing a non-integer division of a single clock signal in a communication device, the communication device including at least two modules is provided. In a system aspect, the system includes first and second divider circuits within one module of the at least two modules, the first and second divider circuits dividing the single clock signal to produce a first clock signal and a second clock signal. The system further includes logic means within the one module and coupled to the first and second divider circuits, the logic means logically combining the first and second clock signals to produce a non-integer division of the single clock signal for use by the other module of the at least two modules.

REFERENCES:
patent: 4270204 (1981-05-01), Gordon
patent: 5339345 (1994-08-01), Mote
patent: 5384816 (1995-01-01), Prysby et al.
David A. Bell, Solid State Pulse Circuits, Second Edition, p. 354, Jan. 1981.

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