Non-erasable EPROM cell for redundancy circuit

Details Non-erasable EPROM cell for redundancy circuit Non-erasable EPROM cell for redundancy circuit

1990-09-14

1992-02-04

Fears, Terrell W.

Static information storage and retrieval

Hardware for storage elements

Shields

365200, 365 51, G11C 1300

Patent

active

050864106

ABSTRACT:
A semiconductor electrically programmable read only memory (EPROM) contains an array of memory cells that store data which is erased when the EPROM is exposed to radiation, and also contains redundant memory circuitry. The redundant memory circuit includes one or more rows or columns of redundant memory cells. A programmable redundancy control circuit determines, for each row or column of redundant memory cells, which row or column of defective memory cells it will be used to replace. The programmable redundancy control circuit has a plurality of non-erasable EPROM cells. Distinct metal connection lines, formed from a first metal layer, are coupled to the drain region of each non-erasable EPROM cell for detecting the data stored therein. A metal shield, formed from a second metal layer, overlies the non-erasable EPROM cells and the metal connection lines. Further, vertical metal walls coupled to the metal shield at least partially block radiation from entry under the metal shield. The metal shield and vertical metal walls enable the non-erasable EPROM cells in the programmable redundancy control circuit to be permanently programmed so that each row or column of redundant memory cells can be assigned a permanent address.

REFERENCES:
patent: 4933898 (1990-06-01), Gilberg et al.
patent: 4958320 (1990-09-01), Homma et al.

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