Non-destructive burn-in test socket for integrated circuit die

Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...

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Details

439487, 439 68, 324158F, H05K 100

Patent

active

051238500

ABSTRACT:
Disclosed is a burn-in test socket which serves as a temporary package for integrated circuit die, multichip hybrid or a complete wafer without damaging the bonding pads or insulating passivation on the die during test and burn-in.

REFERENCES:
patent: 3766439 (1973-10-01), Isaacson
patent: 4169642 (1979-10-01), Mouissie
patent: 4341842 (1980-07-01), Cutchaw
patent: 4597617 (1986-07-01), Enochs
patent: 4679118 (1987-07-01), Johnson et al.
patent: 4859189 (1989-08-01), Peterson et al.
patent: 4922376 (1990-05-01), Pommer et al.

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