Non-contact I/O signal pad scan testing of VLSI circuits

Details Non-contact I/O signal pad scan testing of VLSI circuits Non-contact I/O signal pad scan testing of VLSI circuits

1989-02-21

1989-10-17

Karlsen, Ernest F.

Electricity: measuring and testing

Plural, automatically sequential tests

371 251, G01R 3128

Patent

active

048750034

ABSTRACT:
In a microcircuit employing LSSD boundary scanning, input and output cells of the circuit are tested using the LSSD boundary scan circuity. Input cells of the circuit are tested by applying two voltages alternately to input cell signal pads and capturing and shifting out through input boundary scan circuitry the responses of the input cells to the voltages. Output cells are tested by shifting a predetermined test pattern through the output boundary scan circuitry. The pattern encloses a set of significant bits which is applied sequentially to the output cells. Each output cell has a gated signal path connecting its signal pad to an internal signal conductor which conducts the response of the output cell to an internal signal path as the significant bits of the bit pattern are scanned past the cell.

REFERENCES:
patent: 4791358 (1988-12-01), Sauerwalp et al.
IEEE article reprinted from the Proceedings of the Fourtheenth Design Automation Conference, 1977, pp. 462-468, copyright 1977 by IEEE.

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