Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-04-05
2002-04-23
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S106000
Reexamination Certificate
active
06376265
ABSTRACT:
FILED OF THE INVENTION
The present invention relates to a method and apparatus for die bonding in semiconductor package structures. The present invention has particular applicability in manufacturing stacked die and flip-chip package assemblies.
BACKGOUND ART
One type of conventional semiconductor packaging structure is known as a “stacked die” package, wherein a first bare semiconductor ship, called a “die”, is bonded, as with epoxy adhesive, to a substrate, such as a circuit board or lead frame, and a second die is bonded to the top surface of the first die using adhesive tape or epoxy. Wire bonds electrically connect both dies to the substrate.
The first and second dies are typically bonded using automated die bonding equipment that pick up a die and places it in a predetermined position slightly above the substrate or first die, respectively, thereby creating a gap between the die and the surface to which it is to bond. The adhesive fills this gap. To avoid damage to the dies from contact with each other or the substrate, it is necessary to ascertain the location of the top surface of the substrate (i.e., its height, or “z-dimension”) before bonding the first die to the substrate. Likewise, it is necessary to ascertain the location of the top surface of the first die before bonding the second die.
Conventional techniques for setting the die bonder to place the dies in position for bonding include a trial-and-error method, wherein the height of the substrate or substrate/first die assembly is measured, as with a micrometer, and the die bonder adjusted accordingly. If the adjustment is determined to be incorrect after testing, the die bonder is re-adjusted as needed. A significant drawback of the trial-and-error technique when used with stacked die packages is that it cannot automatically compensate for variations in the height of the substrate/first die assembly. Thus, for example, when the top surface of the first die is higher than expected by the die bonder due to the limitations of the manufacturing or assembly process, the first die and/or second die could be damaged when the second die descends on the first die without adequate clearance.
This drawback of the trial-and-error method has been addressed in the prior art by the adoption of a feedback height adjustment mechanism, wherein a sensor makes physical contact with the top surface of the first die, then sends a signal to a die bonder controller indicative of the height of the first die. The controller then sets the descending height of the second die onto the first die responsive to the height signal to produce the required gap between the dies, thereby avoiding damage to either die.
Disadvantageously, conventional physical contact height sensors, typically comprising needles for touching the die, can damage the top surface of the die, thereby causing failure of the completed assembly. To overcome this drawback, it has been proposed to utilize a laser sensor for non-contact height measurement. However, lasers are problematic in that laser radiation can be reflected from the top surface of the die, due to the presence of reflective materials such as silicon and aluminum in the die, thereby reducing the accuracy of the height measurement. Furthermore, certain types of dies may be damaged by exposure to laser radiation.
These exists a need for a method and apparatus for measuring the height of package assemblies comprising semiconductor dies that is accurate and does not damage the dies.
SUMMARY OF THE INVENTION
An advantage of the present invention is a method and apparatus for accurately measuring the height of a top surface of a substrate or die prior to a die bonding operation that does not damage the die.
Additional advantages and other features of the present invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the invention. The advantages of the invention may be realized and obtained as particurlarly pointed out in the appended claims.
According to the present invention, the foregoing and other advantages are achieved in part by a method of manufacturing a semiconductor package assembly, which method comprises directing a jet of air to a top surface of a substrate; determining a vertical position of the top surface of the substrate based on the back pressure of the jet air; and positioning a semiconductor device a predetermined distance above the top surface of the substrate, based on the determination of the vertical position of the substrate top surface, for bonding the semiconductor device to the substrate.
Another aspect of the present invention is an appartus for acrrying out the above method.
REFERENCES:
patent: 5766984 (1998-07-01), Ramm et al.
patent: 5784780 (1998-07-01), Loo
patent: 6232152 (2001-05-01), Distefano et al.
patent: 08137154 (1997-12-01), None
Dang Phuc T.
Nelms David
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