Non-conforming PCI bus master timing compensation circuit

Details Non-conforming PCI bus master timing compensation circuit Non-conforming PCI bus master timing compensation circuit

1995-03-03

1996-09-24

Harvey, Jack B.

395550, G06F 1300, G06F 114

Patent

active

055599680

ABSTRACT:
A circuit for preventing a non-conforming PCI bus master from performing cycles where the address driven is not provided soon enough for receiving circuitry to latch the address. The circuit modifies the bus grant signal to force the non-conforming PCI bus master to temporarily release the bus instead of performing a second data transfer cycle within the same bus access so that a conforming cycle is subsequently performed when the bus is reacquired by the non-conforming PCI bus master. The circuit forces the non-conforming PCI bus master off the bus even though the non-conforming PCI bus requests the bus and an arbiter has granted the bus to the non-conforming PCI bus master.

REFERENCES:
patent: 4631702 (1986-12-01), Korba
Am79C970 Pcnet.TM.-PCI Single-Chip Ethernet Controller for PCI Local Bus, Publication #18220 Issue Date: Jun. 1994.
PCI Local Bus Specification-Production Version-Revision 2.0 Apr. 30, 1993.
Peripheral Component Interconnect (PCI) Add-in Board/Connector Addendum Feb. 26, 1993 (Final Draft).
PCI Local Bus-PCI to PCI Bridge Architecture Specification-Revision 1.0 Apr. 5, 1994.
PCI Local Bus-PCI System Design Guide-Revision 1.0 Sep. 8, 1993.
PCI Local Bus-PCI Compliance Checklist-Revision 2.0b Oct. 1994.
PCI Local Bus-PCI Bios Specification-Revision 2.1 Aug. 26, 1994.
PCI Mobile Design Guide-Oct. 27, 1994 Revision 1.0.

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