Non-coherent six-port receiver

Details Non-coherent six-port receiver Non-coherent six-port receiver

1998-07-14

2002-03-26

Chin, Stephen (Department: 2634)

Pulse or digital communications

Receivers

Angle modulation

C375S283000, C375S340000

Reexamination Certificate

active

06363125

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and a receiver for receiving and demodulating a high frequency signal by direct conversion. The present application is furthermore directed on a mobile communication device and a cellular telephone comprising such a receiver.
2. Description of the Related Art
Recently it has been shown that a so-called 6-port receiving circuit in conjunction with a digital signal processor is capable of performing digital demodulation directly at frequencies ranging from microwave to mm-wave bands. This new direct digital receiver promises reduced receiver complexity, low fabrication requirements and fair performance in providing a cost-effective alternative to the conventional heterodyne structure used in various digital terminals.
The most widely used modulation schemes in digital communication systems, such as satellite and personal communication systems, are PSK (phase shift keying). There are two types of demodulation techniques: Coherent and non-coherent (differential). In general, the differential detection brings about less complicated receiver configuration whereas the coherent detection is superior in error performance. However, the complexity of a coherent receiver may be increased significantly due to the carrier recovery requirement. This task becomes particularly difficult when the carrier recovery has to be performed directly at microwave and mm-wave frequencies.
FIG. 3
b
shows schematically the application area of a direct six-port receiver as a partial or complete replacement of a conventional heterodyne receiver structure (
FIG. 3
a
).
FIG. 4
shows the structure of a 6-port receiver known from Bossisio, Wu “A six-port direct digital millimeter wave receiver”, Digest of 1994 IEEE MTT Symposium, vol. 3, page 1659-1662, San Diego, May 1994.
The six-port technique has been known for its ability to accurately measure the scattering parameters, both amplitude and phase, of microwave networks. Instead of using heterodyne receivers a six-port receiver accomplishes direct measurements at microwave and mm-wave frequencies by extracting power levels at at least three and particularly four of the six ports. The imperfections of the hardware can be readily eliminated by an appropriate calibration procedure. Very accurate measurements can be made of a large dynamic range and wide frequency range. 6-port junction receivers consist of passive microwave components such as directional couplers and power dividers as well as diode detectors. The circuit can be easily integrated as MHMIC or MMIC. The known receiver performs direct phase/amplitude demodulation at microwave and mm-wave frequencies. The traditional I-Q block in a receiver is replaced by a 6-port phase/frequency discriminator which contains a 6-port receiver and a digital signal processing (DSP) unit. The incoming digitally modulated RF-signal is compared with the output of a digital controlled local oscillator
18
. Carrier recovery is first performed. The DSP-unit
17
detects the frequency difference of the signals and then controls the local oscillator
18
to track the incoming signal. Once the carrier is recovered the instantaneous phase of the received signal is detected and decoded so as to recover the original modulated data. The maximum data transmission rate is determined mainly by the sampling rate of the A/D-converters
16
and the processing speed of the DSP-unit
17
.
By performing a calibration procedure the hardware imperfections such as phase error of the bridges, imbalance of the power detectors, etc. can be readily eliminated. This significantly eases the requirement of the hardware implementation and enables the 6-port receiver to operate over wide band up to mm-wave frequencies. In a 6-port receiver the magnitude in phase are acquired independently. Therefore, the phase modulation of the incoming signal can still be detected correctly even though the amplitude of the incoming signal changes over a large dynamic range. Switching between different modulations can be readily accomplished by slight alternations of the algorithm in the DSP-unit
17
.
A receiver as shown in
FIG. 4
is called a coherent receiver. However, there is the problem that the known 6-port receiver is quite complicated and particularly cannot be integrated on one chip because of the existence of the local oscillator
18
.
OBJECT OF THE INVENTION
It is therefore the object of the present invention to provide a method and a receiver for receiving and demodulating a high frequency signal by direct conversion with a simplified structure and with less costs.
The central idea of the present invention thereby is to replace the coherent receiver by a non-coherent detection receiver.
SUMMARY OF THE INVENTION
According to the invention a method is provided for receiving a high frequency signal by direct conversion. A digitally modulated input signal is divided in at least two branches. One of the branches is delayed relatively to the other one of the branches by a predetermined delay constant. At least three power levels and preferably four power levels are calculated based on combinations of the two branches of the input signal relatively delayed to each other. Then the phase and the amplitude of a complex signal is calculated, said complex signal representing the relation (ratio) between the two branches of the input signal relatively delayed to each other, on the basis of their three or four power levels.
Both branches of the input signal can be delayed, wherein the delay constant of the two branches is different.
The at least three power levels can be A/D-converted and the phase on the amplitude of the complex signal can be calculated by digital processing.
The relative delay between the two branches of the input signal can be equal or greater than the inverse of the sampling rate of the A/D-conversion.
The modulated input signal can be differentially PSK modulated and the complex signal can be calculated on the basis of the at least three analog power levels.
The calculation of the at least three power levels can be affected by means only of linear passive components, such as detection diodes.
The step of calculating the phase and the amplitude of the complex signal can furthermore comprise the step of calculating calibration coefficients.
The step of calculating the phase and the amplitude of the complex signal can furthermore comprise the transformation of the complex signal in real (I) and imaginary (Q) parts.
According to the present invention furthermore a receiver for demodulating a high frequency signal by direct conversion is provided. The receiver comprises a power divider to divide a modulated input signal in at least two branches. At least one delay line is provided for delaying one of the branches relatively to each other by a predetermined constant. A calculating circuit calculates at least three power levels based on e.g. linear combinations of the two branches of the input signal which are delayed relatively to each other by a predetermined delay constant. A processing means calculates the phase and the amplitude of a complex signal representing the relation (ratio) between the two branches of the input signal relatively delayed to each other, on the basis of the said at least three power levels.
Two delay lines can be provided for delaying respectively one of the branches of the input signal, the two delay lines having different delay constants.
A/D-converters can be provided for converting the at least three power level's output by the calculating circuit. In that case the processing means can be a digital processing means.
The delay between the two branches of the input signal can be set equal or greater than the inverse of the sampling rate of the A/D-converters.
The modulated input signal can be a differentially PSK modulated signal and in that case the processing means can be analog processing means.
The calculation circuit can comprise only linear passive components.
The delay line and the calculating circuit can be integrat

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