Non-aligned DRAM state machine for page-mode DRAM control

Details Non-aligned DRAM state machine for page-mode DRAM control Non-aligned DRAM state machine for page-mode DRAM control

1991-08-07

1993-05-11

Richardson, Robert L.

G06F 104

Patent

active

052108562

ABSTRACT:
An apparatus and method for operating a system component in a microprocessor system. The component is operated by a component controller which runs off a clock having a frequency different than the system clock. The controller is synchronized with the system clock at the conclusion of a component access cycle. The state machine of the controller can thus operate independently of the system clock and timing options implemented by the controller need not have an even number of states.

REFERENCES:
patent: 4615017 (1986-09-01), Finlay et al.
patent: 4835733 (1989-05-01), Powell
patent: 4970418 (1990-11-01), Masterson
patent: 4977494 (1990-12-01), Gabaldon et al.
patent: 5097437 (1992-03-01), Larson

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