Noise suppression in recovery of clock from NRZ data

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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328 63, 328164, 307268, 375118, H03K 508, H03K 5153

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active

049298496

ABSTRACT:
A clock generator for extracting a clock signal from a data signal includes a timing recovery circuit operable to produce an output recovered clock which is synchronized with transitions occurring at its input. A circuit gates data transitions to the clock recovery circuit input only during time windows defined in a manner based upon the recovered clock. The time windows are produced by comparing the output of an integrator on the recovered clock signal to a reference. The comparator output resets a D-flip flop, to which the data is applied as a clock, the output of the D-flip flop being connected to the input of the timing recovery circuit.

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