Coded data generation or conversion – Digital code to digital code converters – To or from 'n' out of 'm' codes
Reexamination Certificate
2006-06-20
2006-06-20
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from 'n' out of 'm' codes
C375S219000, C455S003060
Reexamination Certificate
active
07064691
ABSTRACT:
A noise suppression circuit encompasses an internal circuit, a bypass capacitor, first and second transistors. The internal circuit has high and low level terminals, and the low level terminal is connected to a low level power supply line. The internal circuit is supplied with enable and inverted enable signals. The first transistor has a first control electrode, and one main electrode is connected to the high level terminal. The first control electrode is supplied with the inverted enable signal. The bypass capacitor is connected between the other main electrode of the first transistor and the low level power supply line. The second transistor is connected between the other main electrode of the first transistor and a high level power supply line. The second transistor has a second control electrode supplied with the enable signal. The second transistor is not conductive when the internal circuit is active.
REFERENCES:
patent: 4486739 (1984-12-01), Franaszek et al.
patent: 4965883 (1990-10-01), Kirby
patent: 5022051 (1991-06-01), Crandall et al.
patent: 5367187 (1994-11-01), Yuen
patent: 5612694 (1997-03-01), Jedwab et al.
patent: 5692021 (1997-11-01), Walker
patent: 5764648 (1998-06-01), Yamane et al.
patent: 5825824 (1998-10-01), Lee et al.
patent: 6047175 (2000-04-01), Trompower
patent: 6191647 (2001-02-01), Tanaka et al.
patent: 6198413 (2001-03-01), Widmer
patent: 6215982 (2001-04-01), Trompower
patent: 6351501 (2002-02-01), Murdock
patent: 6510324 (2003-01-01), Fukumura
patent: 6621427 (2003-09-01), Greenstreet
patent: 6636166 (2003-10-01), Sessions et al.
patent: 6661360 (2003-12-01), Lambert
patent: 6711258 (2004-03-01), Sung
patent: 6876315 (2005-04-01), Widmer
patent: 6906996 (2005-06-01), Ballantyne
patent: 6987947 (2006-01-01), Richenstein et al.
patent: 59-212027 (1984-11-01), None
patent: 360217724 (1985-10-01), None
Takashima et al., “Noise Suppression Scheme for Giga-Scale DRAM with Hundreds of I/Os”, 1996, pp. 43-49, no month.
Igarashi Mutsunori
Ishioka Takashi
Murakata Masami
Nojima Reiko
Takeuchi Hideki
Foley & Lardner LLP
Kabushiki Kaisha Toshiba
Wamsley Patrick
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