Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression
Reexamination Certificate
1998-09-02
2002-10-01
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Unwanted signal suppression
C327S311000, C327S558000, C327S551000
Reexamination Certificate
active
06459331
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technique to suppress an electromagnetic radiation noise, and more particularly to a switching noise suppression circuit to suppress a switching noise of a circuit in which an activation and a inactivation are repeated by an enable signal, a built-in noise filter type data holding circuit in which this switching noise suppression circuit is built, a car navigation apparatus which comprises this built-in noise filter type data holding circuit, a communication circuit for sending and receiving a digital signal through data buses and a communication apparatus which comprises this circuit. Moreover, the present invention relates to a technique to suppress an electromagnetic radiation noise in an application-specific integrated circuit (ASIC).
2. Description of the Related Art
Recently, an environment problem of an electromagnetic radiation has been largely taken up. The generation of an EMI (electromagnetic interference) noise may cause another electronic apparatus to be erroneously operated, which may result in a serious trouble.
The EMI noise is roughly classified into the three basic types listed below:
(1) a conduction noise from a power supply line;
(2) a leakage noise from a port; and
(3) a radiation noise from an LSI surface.
The (1) conduction noise from the power supply line depends on a waveform of a power supply current, and is conducted/radiated with the power supply line as an antenna. In a case of the (2) leakage noise from the port, a change of a potential of the power supply is conducted/radiated from a pin of an LSI, such as a port and the like, with an external wire as an antenna. The (3) radiation noise from the LSI surface is mainly radiated from the LSI surface to space with a current loop as an antenna.
Among them, the conduction noise from the power supply line has the largest possibility of having a bad influence on other electronic apparatuses. Thus, the counter-plan thereof is of urgent necessity. As for this conduction noise from the power supply line, a change of a signal inputted to a circuit causes the power supply current to be changed, which results in the generation of the noise. This is typically referred to as a switching noise. Conventionally, an RC filter is inserted as shown in
FIG. 1
, in order to suppress such a switching noise.
In
FIG. 1
, a capacitor C is referred to as “a bypass capacitor”, and a resistor R is referred to as “a limiter resistor”. For example, the bypass capacitor C is made of the gate capacitance of transistors constituting an LSI. The limiter resistor R is made of a polysilicon-resistor or an aluminum resistor which is mounted on the predetermined portions of a semiconductor chip constituting the LSI. Moreover, in
FIG. 1
, an enable signal GN is a signal based on a clock signal, and an internal circuit
101
is constituted by, for example, a latch.
FIGS. 2A
to
2
D are views of showing waves at respective nodes when the circuit shown in
FIG. 1
is simulated by using simulation program with integrated circuit emphasis (SPICE). Then,
FIG. 2A
shows a voltage waveform of the enable signal GN,
FIG. 2B
shows a voltage waveform of an input signal DIN,
FIG. 2C
shows a voltage waveform of an output signal Q and
FIG. 2D
shows a current waveform of a high level power supply line VDD.
When the enable signal GN is triggered to the internal circuit
101
connected to the high level power supply line VDD, the power supply current flows. If the activation current GN is similarly repeated for each constant period as shown in
FIG. 2A
, the power supply current also has a constant period as can be seen from FIG.
2
D. An electromagnetic wave radiated by this power supply current can be determined by using the Maxwell equations. However, a noise analysis is usually performed by performing a Fourier analysis on the power supply current and using a spectrum represented as a transmission amount (dB) to a reference value for each frequency.
FIG. 3
shows the spectrum to the power supply current shown in
FIG. 2D. A
reference value of a noise level shown on a vertical axis in
FIG. 3
is assumed to be 1 A. Hereafter, a reference value is assumed to be 1 A when the spectrum of the noise is similarly shown. It is presumed that a smaller transmission amount (dB) has a lower noise level. Similarly, the power of a radiation can be represented by using the spectrum. However, it is omitted.
In
FIG. 1
, when the enable signal GN is triggered and the internal circuit
101
is operated, a current is supplied from the high level power supply line VDD and further a current is supplied from charges accumulated in the bypass capacitor C. At this time, the current running through the high level power supply line VDD is limited by the limiter resistor R. Thus, the sudden change of the power supply current becomes small. This results in the reduction of the noise level as compared with a case having no RC filter.
In the prior art shown in
FIG. 1
, the noise filter constituted by the limiter resistor R and the bypass capacitor C as shown in
FIG. 1
is used to suppress the switching noise. However, especially, since many latches used in an integrated circuit are simultaneously operated in synchronization with a clock, the power supply current suddenly flows to thereby generate the switching noise. At this time, if the capacitance of the bypass capacitor C is small and a load current is large, the switching noise may exceed an allowable value.
That is, in the conventional configuration in
FIG. 1
, the load current consumed by the internal circuit
101
is directly supplied from the high level power supply line VDD to thereby cause the sudden flow of the power supply current. Hence, it is necessary to mount the bypass capacitor C having a large capacitance in order to sufficiently suppress the switching noise generated at that time.
However, it is conventionally difficult to insert the bypass capacitor having the large capacitance in the view of a limitation of a chip area, a cost and the like when the RC filter is inserted into the chip of the LSI. After all, the consideration of the chip area and the cost leads to the unavoidable utilization of the bypass capacitor having the small capacitance for them. In this case, it is very difficult to sufficiently suppress the switching noise generated by the sudden change of the power supply current. In the present condition, it is also impossible to deal with the generation of the switching noise which exceeds the allowable value.
Incidentally, a semicustom design methodology of using a gate array and a standard cell has been mainly used as an approach of designing the LSI in order to respond to a requirement of shortening a turn around time (TAT) of a product and a system. In the gate array, as shown in
FIG. 4A
, a master chip in which basic cells
201
composed of a plurality of transistors are arranged in a form of a grid is made in advance, and then any metal interconnect is disposed on the master chip in accordance with a request of a client. The gate array has a feature of shortening the TAT of the chip, since various logic circuits can be formed only by changing the metal layer.
The conventional basic cells
201
u
and
201
l
shown in
FIG. 4A
have two n channel MOS transistors (hereafter, referred to as an nMOS transistor) and two p channel MOS transistors (hereafter, referred to as a pMOS transistor), respectively. A substrate contact region
202
is formed between the upper basic cell
201
u
and lower basic cell
201
l
. Contact holes are formed on this substrate contact region
202
to establish the ohmic contact between the metal interconnect on an upper level and the well region on a lower level. A signal line, a ground line and the power supply line are wired with the metal interconnect (conductive layer) on the upper level such as an aluminum layer and the like, although they are not shown in FIG.
4
A.
On the other hand, in a cell base LSI, standard cells having a desired logic function are forme
Igarashi Mutsunori
Ishioka Takashi
Murakata Masami
Nojima Reiko
Takeuchi Hideki
Foley & Lardner
Kabushiki Kaisha Toshiba
Le Dinh T.
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