Noise shaper capable of generating a predetermined output patter

Details Noise shaper capable of generating a predetermined output patter Noise shaper capable of generating a predetermined output patter

1994-12-07

1998-01-27

Chin, Stephen

Pulse or digital communications

Pulse code modulation

Correcting or reducing quantizing errors

375350, 341143, 341200, H04B 1404

Patent

active

057128740

ABSTRACT:
In a noise shaper comprising first and second cascaded integrators, a quantizer receiving an output signal of the second integrator, and a feedback path for feeding back an output of the quantizer to each of the first and second integrators, the first integrator includes an adder having a first input receiving art input signal applied to the first integrator, a delay circuit receiving an output of the adder to output a one-sample-delayed signal, and a multiplying circuit having an input connected to an output of the delay circuit for multiplying the one-sample-delayed signal outputted from the delay circuit, by a positive coefficient "0.999". An output of the multiplying circuit is connected to a second input of the adder. An output of the delay circuit constitutes the output of the first integrator.

REFERENCES:
patent: 5278559 (1994-01-01), Yazawa
patent: 5420892 (1995-05-01), Okamoto
patent: 5493297 (1996-02-01), Nguyen et al.
Chao et al., "A Higher Order Topology for Interpolative Modulators for Oversampling A/D Converters," IEEE Transactions on Circuits and Systems, vol. 37, No. 3, Mar. 1990, pp. 309-318.
Longo et al., "A 13 bit ISDN-band Oversampled ADC using Two-Stage Third Order Noise Shaping," IEEE 1988 Custom Integrated Circuits Conference, pp. 21.2.1-21.2.4.

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