Amplifiers – Sum and difference amplifiers
Reexamination Certificate
1999-09-27
2001-12-11
Pascal, Robert (Department: 2817)
Amplifiers
Sum and difference amplifiers
C330S009000
Reexamination Certificate
active
06329876
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the use of operational amplifiers (op amps) in differential signal architectures. More specifically, the present invention provides techniques by which the performance of op amps which generate differential signals may be enhanced.
In analog integrated circuits, electrical signals are often processed in differential form, i.e., each signal has a paired counterpart of equal amplitude and opposite phase. Differential architectures are employed for a number of reasons including, for example, the fact that differential architectures exhibit significantly better power supply noise rejection than single-ended designs. Op amps are among the most common circuit components in differential systems.
FIG. 1
shows an op amp circuit which is commonly employed in differential designs.
FIG. 1
shows a circuit 100 for converting an incoming single-ended signal Vin to a differential signal represented by V+ and V−. Such circuits are common where, for example, an integrated circuit with a differential architecture is embedded in a larger system where it must interface with single-ended signals. The conversion from a single-ended to a differential signal involves using a first op amp
1
as an input buffer and a second op amp
2
to create a phase-inverted counterpart of Vin. Both the original in-phase signal (V−) and the phase-inverted version (V+) are then fed to subsequent differential circuitry (e.g., op amp
3
). The buffering provided by op amp
1
provides a low impedance signal to subsequent circuits. While this is desirable, it does not come without a cost. That is, the addition of a stage of amplification adds noise, distortion, offset, and possibly other undesirable effects.
As shown in
FIG. 1
with reference to op amp
1
and assumed for the op amps in each of the figures described herein, the noise voltage associated with each op amp is modeled as an input referred noise voltage source Vn. The input-referred noise sources for specific op amps will be identified by a reference number subscript. That is, the noise source for op amp
1
is denoted Vn
1
. The noise values are given in squared noise voltage, e.g., Vn
1
2
. As will be understood and assuming the noise sources are uncorrelated, a weighted sum of these noise voltages is calculated as the square root of the sum of the squares. As will also be understood, the input gain is set by the ratio of resistor value R
2
to resistor value R
1
. Resistor values for R
3
and R
4
are equal in value to ensure that V+is equal in amplitude to V− as well as being opposite in phase. Op amp
3
and resistors R
5
-R
8
are shown as representative of differential circuitry which might follow the single-ended to differential conversion, but will not be further discussed here. The key parameter of interest is the noise voltage presented to the equivalent input of the differential circuitry, i.e., Vdiff =(V+)−(V−). The expression for the noise voltage at V− is:
Vn
2
(V−)=Vn
1
2
(1+R
2
/R
1
) (1)
The expression for the noise voltage at V+ is:
Vn
2
(V+)=Vn
2
2
(1+R
4
/R
3
)−Vn
1
2
(1+R
2
/R
1
)(R
4
/R
3
) (2)
Since R
3
=R
4
:
Vn
2
(V+)=2 Vn
2
2
−Vn
1
2
(1+R
2
/R
1
) (3)
Then the noise presented at the input to op amp
3
may be represented as follows:
Vndiff
2
=
Vn
2
(
V
+
)
-
Vn
2
(
V
-
)
(
4
)
=
2
Vn
2
2
-
Vn
1
2
(
1
+
R2
/
R1
)
-
Vn
1
2
(
1
+
R2
/
R1
)
(
5
)
=
2
Vn
2
2
-
2
Vn
1
2
(
1
+
R2
/
R1
)
(
6
)
It can be seen that the noise voltage of the input buffering amplifier, Vn
1
2
, is amplified by the non-inverting gain configuration of op amp
1
, and applied to the V− input of the differential circuitry. This same amplifier noise voltage is also phase-inverted an applied to the V+ input of the differential circuitry. Thus, Vn
1
2
is effectively amplified by both op amp
1
and op amp
2
. This then calls for a particularly low-noise op amp in the op amp
1
position in order to minimize its noise contribution. As will be understood, low-noise op amps are expensive both in terms of money and silicon.
It is therefore desirable to provide techniques by which the noise performance of op amps in differential architectures may be improved.
SUMMARY OF THE INVENTION
According to the present invention, a technique is provided by which the performance of operational amplifiers (op amps) in differential architectures is significantly improved. According to the various embodiments described, first and second op amps are configured to generate a differential signal, the first op amp generating one end of the differential signal and the second op amp generating the other. The op amps may be configured to receive a single-ended signal and convert it to a differential signal. Depending upon the single-ended to differential application, the op amps may be configured in either an inverting or noninverting configuration. The op amps may also be configured in a “pseudo” differential arrangement in which each receives half of a differential signal and buffers and/or amplifies it to generate a differential output signal. In each configuration, the inverting input of one of the op amps is coupled to the noninverting input of the other. That is, instead of biasing the noninverting input of the second op amp to ground or a constant bias voltage, it is tied to the signal input of its companion device. According to a specific embodiment, a number of switches are provided which effect the various configurations of the two op amps depending upon the application.
As will be described in detail below, the effect of this configuration is that a significant component of the input referred noise of the first op amp is presented as a common mode signal on the differential output, this component thus being eliminated by downstream devices, e.g., other op amps, which presumably have excellent common mode rejection. In fact, noise improvement is not the only advantage gained by the present invention. That is, as will be discussed, the deleterious effects of any anomalous op amp behavior which may be modeled as an input referred voltage source, e.g., distortion, is likewise diminished by the technique described herein.
Thus, the present invention provides methods and apparatus for generating a differential signal. The output of a first operational amplifier corresponds to one end of the differential signal. The output of a second operational amplifier corresponds to the other end of the differential signal. The inverting input of the first operational amplifier is coupled to the noninverting input of the second operational amplifier.
A further understanding of the nature and advantages of the present invention may be realized by reference to the remaining portions of the specification and the drawings.
REFERENCES:
patent: 3566298 (1971-02-01), Stevens
patent: 4888559 (1989-12-01), Sevenhans et al.
patent: 5140591 (1992-08-01), Palara et al.
patent: 5376899 (1994-12-01), Pass
patent: 5606281 (1997-02-01), Gloaguen
patent: 5736826 (1998-04-01), Hrassky
patent: 5841318 (1998-11-01), Cram
patent: 5841321 (1998-11-01), Miyake et al.
patent: 5990737 (1999-11-01), Czarnul et al.
patent: 6163212 (2000-12-01), Konno
Beyer Weaver & Thomas LLP
Nguyen Khanh Van
Pascal Robert
Tripath Technology Inc.
LandOfFree
Noise reduction scheme for operational amplifiers does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Noise reduction scheme for operational amplifiers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Noise reduction scheme for operational amplifiers will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2594902