Noise reduction circuit for video signal having suitable nonline

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358 36, H04N 521

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active

048335371

ABSTRACT:
A noise reduction circuit stores the video signal of one frame as input through an A/D converter from a VTR main body, into a frame memory via a first subtracting circuit. A second subtracting circuit subtracts the delayed video signal delayed one frame, which is derived from said frame memory, from the video signal. The same outputs the subtraction result as a difference signal. The amplitude level of the video signal is detected by the detecting circuit. The nonlinear characteristic appropriate to the difference signal output from the subtracting circuit is selected by the level signal output from the detecting circuit. Subtracting circuit subtracts the noise component selected and extracted by the nonlinear processing circuit from the video signal, thereby to remove the noise component. The video signal with no noise component is applied through a D/A converter from the subtracting circuit, to a CRT display where it is visualized.

REFERENCES:
patent: 4246610 (1981-01-01), Takahashi
patent: 4275418 (1981-06-01), Trump et al.
The Journal of the Institute of Television Engineers of Japan, vol. 33. No. 4, 1979.
Noise Reducer, Television Gakkai, vol. 33, No. 4, 1979; The Journal of the Institute of Television Engineers of Japan (with English Translation).

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