Noise reduction circuit for CCD output signal

Details Noise reduction circuit for CCD output signal Noise reduction circuit for CCD output signal

2005-09-06

2005-09-06

Ho, Tuan (Department: 2615)

Television

Camera, system and detail

Combined image signal generator and general image signal...

C348S311000, C348S607000

Reexamination Certificate

active

06940547

ABSTRACT:
A noise reduction circuit with high noise reduction effect and low power consumption for a high resolution charge coupled device (CCD) as well as for a usual resolution CCD is provided. A delay circuit delays an CCD output signal, and a pulse generator outputs a pulse signal having the same period that the CCD output signal has. A part of period during which the pulse signal is at a high level overlaps with a signal-level period oh the CCD output signal. A first non-additive mixing (NAM) circuit selects and output a lower level signal between the CCD output signal and the pulse signal. A second NAM circuit selects and outputs a lower level signal between the output signal from the delay circuit and the pulse signal. A difference circuit calculates difference between an output signal of the first NAM circuit and an output signal of the second NAM circuit. A delay time of the delay circuit is set so that a feedthrough-level period of an output signal of the delay circuit overlaps with a signal-level period of the CCD output signal.

REFERENCES:
patent: 5715000 (1998-02-01), Inamori
patent: 04-159880 (1992-06-01), None

Affiliated with

Also associated with

Rating

Noise reduction circuit for CCD output signal does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Noise reduction circuit for CCD output signal, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Noise reduction circuit for CCD output signal will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3381500