Noise reduction circuit and compatable plural-unit display

Details Noise reduction circuit and compatable plural-unit display Noise reduction circuit and compatable plural-unit display

1990-08-03

1992-10-27

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358167, 358240, H04N 701, H04N 521

Patent

active

051594501

ABSTRACT:
A video image displaying system comprises first video equipment for converting a HDTV video signal to a plurality of video signals of a second format for display on a plurality of television receivers responsive to signals of the second format and second video equipment for providing one or more video signals of the second format to selected television receivers in response to a switching circuit. The image displaying system includes a noise reduction circuit, with coring circuit, in which the characteristics of first and second filters are set in such a way as their overall characteristic becomes flat so as to reduce a noise overlapping a high frequency range of a video signal. The image displaying system further includes a synchronizing signal generator which provides a phase difference between synchronizing signals to be supplied to a first and second video equipments, thus compensating for a delay time of the high definition television signal encountered in an image dividing unit. Preferably, the high definition television signal a Hi-vision signal and the second format television signal is a NTSC television signal.

REFERENCES:
patent: 3789133 (1974-01-01), Kline
patent: 4573075 (1986-02-01), Bolger
patent: 4866520 (1989-09-01), Nomura et al.
patent: 4962426 (1990-10-01), Naoi et al.
patent: 4984081 (1991-01-01), Miyoshi et al.
patent: 5010413 (1991-04-01), Bahr

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