Noise-reducing circuit

Details Noise-reducing circuit Noise-reducing circuit

1994-03-25

1996-05-07

Young, Brian K.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

H03M 112

Patent

active

055150497

ABSTRACT:
A noise-reducing circuit for performing effective noise reduction without an accompanying trailing phenomenon or other adverse effects with respect to the edge of a moving image portion. Digital sample values as output from an A/D converter are input to a waveform equalizer, which performs prescribed waveform equalizing processing with a MUSE format resample condition being met. In a noise reducing unit, for the various resample values from waveform equalizer, the correlation value in the impulse response waveforms corresponding to the resample values is derived from the sample values around the resample value and the other resample values, and the sum of the resample value and the correlation value is calculated. In this way, a resample value with an increased signal
oise ratio can be obtained at the output terminal of the noise reducing unit.

REFERENCES:
patent: 5089917 (1992-02-01), Kanota et al.
patent: 5353069 (1994-10-01), Kobo et al.

Affiliated with

Also associated with

Rating

Noise-reducing circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Noise-reducing circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Noise-reducing circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1230222